Basics in ESD Protection of Radio Frequency Integrated Circuits | SpringerLink
Esd | PDF
Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations | Semantic Scholar
Characterization for ESD Design, the TLP Zoo: Part 1 | EOS/ESD Association, Inc.
Electronics | Free Full-Text | The ESD Characteristics of a pMOS-Triggered Bidirectional SCR in SOI BCD Technology
Snapback and the ideal ESD protection solution (Electrostatic Discharge)
Esd | PDF
Snapback behavior determines ESD protection effectiveness - SemiWiki
Snapback breakdown ESD device based on zener diodes on silicon-on-insulator technology - ScienceDirect
Snapback behavior determines ESD protection effectiveness - SemiWiki
GGNMOS ESD Protection Simulation
Bipolar effects in snapback mechanism in advanced n-FET transistors under high current stress conditions
High Voltage Tolerant ESD Protection Circuit for Plug and Play Devices
An improved GGNMOS triggered SCR for high holding voltage ESD protection applications
MODELING NMOS SNAPBACK CHARACTERISTIC USING PSPICE 1. Introduction 2. NMOS SNAPBACK
Snapback behavior determines ESD protection effectiveness - SemiWiki
A double snapback SCR ESD protection scheme for 28 nm CMOS process - ScienceDirect
Electronics | Free Full-Text | Layout Strengthening the ESD Performance for High-Voltage N-Channel Lateral Diffused MOSFETs
Electronics | Free Full-Text | The ESD Characteristics of a pMOS-Triggered Bidirectional SCR in SOI BCD Technology
Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations | Semantic Scholar
Minimize Unknowns in ESD Tests - Page 2 of 3 - EE Times
Measured IV-curve and simplified model for ESD-protection elements with... | Download Scientific Diagram
